Document details

Clock Synchronization for Many-Core Processors

Author(s): Filipe Miguel Teixeira Monteiro

Date: 2016

Origin: Repositório Aberto da Universidade do Porto

Subject(s): Engenharia electrotécnica, electrónica e informática; Electrical engineering, Electronic engineering, Information engineering; Ciências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática; Engineering and technology::Electrical engineering, Electronic engineering, Information engineering; Ciências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática; Ciências da engenharia e tecnologias::Engenharia electrotécnica, electrónica e informática; Engineering and technology::Electrical engineering, Electronic engineering, Information engineering; Engineering and technology::Electrical engineering, Electronic engineering, Information engineering


Description

In this dissertation we propose to develop, implement, and validate a software based clock synchronization algorithm in a many-core processor architecture, specifically the Kalray MPPA-256 architecture. This work was the objective of reducing the effect of clock skew in many-core architectures, so that we can take full advantage of this hardware type in real-time applications.

Document Type Master thesis
Language English
Contributor(s) Faculdade de Engenharia
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