6 documents found, page 1 of 1

Sort by Issue Date

Mode-Controlled Data-Flow Modeling of Real-Time Memory Controllers

Li, Yonghui; Salunkhe, Hrishikesh; Bastos, João; Moreira, Orlando; Åkesson, Benny; Goossens, Kees

SDRAM is a shared resource in modern multi-core platforms executing multiple real-time (RT) streaming applications. It is crucial to analyze the minimum guaranteed SDRAM bandwidth to ensure that the requirements of the RT streaming applications are always satisfied. However, deriving the worst-case bandwidth (WCBW) is challenging because of the diverse memory traffic with variable transaction sizes. In fact, ex...


Vegetative propagation of the endangered Azorean tree, Picconia azorica

Martins, José; Moreira, Orlando; Silva, Luís; Moura, Mónica

Picconia azorica (Tutin) Knobl. (Oleaceae), commonly named “pau-branco”, is an endangered tree endemic to the Azores. Vegetative propagation may be important for the preservation of this species, particularly in depauperate populations, with low seed set. The objective of this study was to evaluate effective techniques for the vegetative propagation of P. azorica by rooting of stem cuttings or by air layering. ...


Using high-level languages for hardware modeling and implementation

Ferreira, Nelson; Teixeira, Filipe; Lau, Nuno; Oliveira, Arnaldo; Moreira, Orlando

This paper describes the use of highilevel languages in hardware modeling and implementation. The purpose of the article is to describe a methodology that can be used in the design of anew system. First we will describe the main phases of hardware design flow, namely: modeling, validation, synthesis, implementation, prototyping and testing. We will also give a brief overview of somehigh-level languages. Afterwa...


Real-time scheduler with SystemC

Manaia, Hugo; Oliveira, Arnaldo; Lau, Nuno; Moreira, Orlando

This paper discusses the implementation, features and utilization of a real-time scheduler simulator modeled with SystemC. Currently, this scheduler handles only periodic hard real-time tasks. Three scheduling policies were implemented: RM (Rate Monotonic), EDF (Earliest Deadline First) and LSF (Least Slack First). A set of task-related commands is available, which allows the user to create, destroy, stop, star...


Uma introdução aos processadores de arquitectura configurável

Moreira, Orlando; Lau, Nuno; Ferrari, António

Configurable Architecture Processors are computational systems where programmable logic is inserted with in the architecture of a traditional microprocessor core in order to combine the versatility of software and the high performance of hardware. This paper gives an overview of this kind of systems, discussing implementation factors and showing examples of proposed architectures.; Processadores de Arquitectura...


Um simulador para o processador de arquitectura configurável ConCISe

Moreira, Orlando; Kastrup, Bernardo; Lau, Nuno; Ferrari, António

ConCise is a Philips research project on Configurable Architecture Processors, which is expected to make this kind of systems cost-effective for large scale production in the near future. This article starts by presenting the ConCISe architecture. Then it describes the development of a simulator for a ConCISe processor and discusses some of the simulation results. The analysis of these results is done from a co...


6 Results

Queried text

Refine Results

Author

















Date






Document Type



Access rights


Resource




Subject