Document details

Transparent Trace-Based Binary Acceleration for Reconfigurable HW/SW Systems

Author(s): João Bispo ; Nuno Miguel Paulino ; João Paiva Cardoso ; João Canas Ferreira

Date: 2013

Origin: INESC TEC


Description

This paper presents a novel approach to accelerate program execution by mapping repetitive traces of executed instructions, called Megablocks, to a runtime reconfigurable array of functional units. An offline tool suite extracts Megablocks from microprocessor instruction traces and generates a Reconfigurable Processing Unit (RPU) tailored for the execution of those Megablocks. The system is able to transparently movebcomputations from the microprocessor to the RPU at runtime. A prototype implementation of the system using a cacheless MicroBlaze microprocessor running code located in external memory reaches speedups from 2.2x to 18.2x for a set of 14 benchmark kernels. For a system setup which maximizes microprocessor performance by having the application code located in internal block RAMs, speedups from 1.4x to 2.8x were estimated.

Document Type Journal article
Language English
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