Publicação
Power management circuit for piezoelectric energy harvester
| Resumo: | The master dissertation presents a study in the area of mixed analogue/digital signals of CMOS circuits integrating a power management circuit for energy harvester. Focusing on the development of a current and voltage referencing circuits, and a current starved voltage-controlled oscillator addressing low power demands. The circuit components are designed based on 130nm CMOS technology. A physical layout of all the intervenient components described in this project report was developed for fabrication purposes. The choice of this technology adjusts to the research requirements benefiting its robustness, costliness, and performance. The developed work comprises the necessary steps to perform an ASIC project, comprising on circuit schematic optimization and simulation, physical layout design, parasitic extraction, validation of the physical layout, integrated circuit fabrication. A robust voltage reference is capable of outputting a stable 258.35mV with a line sensitivity of 0.49%/V in response to a 1-3.2V voltage supply, also presenting an excellent power supply rejection ratio of 58dB at 100Hz. An implemented current starved voltage-controlled oscillator generates an average periodic signal at a frequency of 84.81kHz. This circuit shows the capability to produce a local clock time to release the stored scavenged from the energy harvester to an application. A current reference can generate a 41.5nA at 2V of power supply, with a 0.19nA/oC. Although the temperature coefficient is not very useful, a self-biased current and voltage reference shows the capability to provide bias for other circuits within the integrated circuit. |
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| Autores principais: | Almeida, Gonçalo Fernandes Ferreira de |
| Assunto: | ASIC CMOS Low-power circuits Oscillator Referencing circuits Circuitos de baixo consumo Circuitos de referência Oscilador Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informática |
| Ano: | 2020 |
| País: | Portugal |
| Tipo de documento: | dissertação de mestrado |
| Tipo de acesso: | acesso aberto |
| Instituição associada: | Universidade do Minho |
| Idioma: | inglês |
| Origem: | RepositóriUM - Universidade do Minho |
| Resumo: | The master dissertation presents a study in the area of mixed analogue/digital signals of CMOS circuits integrating a power management circuit for energy harvester. Focusing on the development of a current and voltage referencing circuits, and a current starved voltage-controlled oscillator addressing low power demands. The circuit components are designed based on 130nm CMOS technology. A physical layout of all the intervenient components described in this project report was developed for fabrication purposes. The choice of this technology adjusts to the research requirements benefiting its robustness, costliness, and performance. The developed work comprises the necessary steps to perform an ASIC project, comprising on circuit schematic optimization and simulation, physical layout design, parasitic extraction, validation of the physical layout, integrated circuit fabrication. A robust voltage reference is capable of outputting a stable 258.35mV with a line sensitivity of 0.49%/V in response to a 1-3.2V voltage supply, also presenting an excellent power supply rejection ratio of 58dB at 100Hz. An implemented current starved voltage-controlled oscillator generates an average periodic signal at a frequency of 84.81kHz. This circuit shows the capability to produce a local clock time to release the stored scavenged from the energy harvester to an application. A current reference can generate a 41.5nA at 2V of power supply, with a 0.19nA/oC. Although the temperature coefficient is not very useful, a self-biased current and voltage reference shows the capability to provide bias for other circuits within the integrated circuit. |
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