Dynamic Voltage-Combiners Biased OTA for Low-Power High-Speed SC Circuits

• Autor(es): Póvoa, R. ; Canelas, A. ; Martins, R. ; Lourenço, N. ; Horta, N. ; Goes, J.
• Data: 2017
• Identificador Persistente: http://hdl.handle.net/10400.26/54463
• Origem: Escola Superior Náutica Infante D. Henrique
• Tipo de Documento: Objeto de conferência
• Idioma: Inglês
• Contribuidor(es): Repositório Comum

Descrição

his paper presents the design of a fully-dynamic voltage-combiners biased CMOS operational transconductance amplifier, for low-power high-speed analog-to-digital converters and high-performance switched-capacitor filters, using the UMC 130nm node. The biasing is controlled by switched-capacitors and simulation results of an optimized solution using AIDA-C, a state-of-the-art multi-objective multi-constraint IC optimization tool, present a DC gain of 60.9dB, a gain-bandwidth product of 155.1MHz for a 6pF load and a current consumption of 0.69mArms for a sampling clock frequency of 100MHz.