Autor(es): Santos, Ângelo ; Tiwari, Bhawna ; Martins, Jorge ; Santa, Ana ; Chapagai, Kamal ; Bahubalindruni, Pydi ; Barquinha, Pedro
Data: 2018
Origem: Repositório Institucional da UNL
Projeto/bolsa: info:eu-repo/grantAgreement/FCT/5876/147333/PT; info:eu-repo/grantAgreement/EC/H2020/716510/EU; info:eu-repo/grantAgreement/EC/H2020/692373/EU;
Assunto(s): Capacitor bootstrapping; IGZO TFTs; Low-voltage operation; Pseudo-CMOS; Shift register; Electrical and Electronic Engineering; Instrumentation
ECR/2017/000931 POCI-01-0145-FEDER-007688 SFRH/BD/122286/2016 ORABAC/17852
This paper presents design and implementation of 8-bit shift register with low-voltage amorphous Indium Gallium Zinc Oxide (a-IGZO) thin-film transistors (TFTs) for row/column selection of pixel matrix in flexible displays. This circuit is capable of ensuring complete rail-to-rail operation by employing novel NAND gates that were developed based on capacitive bootstrapping load. As a first step, a positive edge triggered D-flip flop (D-FF) is designed using these logic gates, then a complete 8-bit shift register is designed and simulated using in-house low-voltage IGZO TFT models in Cadence Virtuoso. During these circuit simulations a power supply voltage of 2V and a channel length of 2 μm were used. Simulation outcome of 8-bit shift register has shown a power consumption of 72.15 μW with output voltage swing of 95% of V dd at 20 kHz operating frequency, going well beyond the state of the art for oxide TFT technology at very low supply voltage. The proposed circuit can be used as a row/column selector in flexible displays that can operate at low supply voltage and allows small active-area.
