Publicação
On-chip array of thermoelectric peltier microcoolers
| Resumo: | This article reports on the theoretical modelling, the Finite Element Modelling (FEM) simulation, the fabrication process and preliminary results of the first on-chip thermoelectric microcooler array (64 pixels arranged in a 88 array), with each pixel independently controlled. This microcooler array uses co-evaporated V–VI compounds of Bi2Te3 and Sb2Te3 as thermoelectric layers, and can be fabricated using planar thin-film technology, lithography and wet etching on top of a silicon wafer, where the CMOS electronic circuits were previously made |
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| Autores principais: | Gonçalves, L. M. |
| Outros Autores: | Rocha, J. G.; Couto, C.; Alpuim, P.; Correia, J. H. |
| Assunto: | Telluride peltier Array telluride peltier microcooler array |
| Ano: | 2007 |
| País: | Portugal |
| Tipo de documento: | comunicação em conferência |
| Tipo de acesso: | acesso aberto |
| Instituição associada: | Universidade do Minho |
| Idioma: | inglês |
| Origem: | RepositóriUM - Universidade do Minho |
| Resumo: | This article reports on the theoretical modelling, the Finite Element Modelling (FEM) simulation, the fabrication process and preliminary results of the first on-chip thermoelectric microcooler array (64 pixels arranged in a 88 array), with each pixel independently controlled. This microcooler array uses co-evaporated V–VI compounds of Bi2Te3 and Sb2Te3 as thermoelectric layers, and can be fabricated using planar thin-film technology, lithography and wet etching on top of a silicon wafer, where the CMOS electronic circuits were previously made |
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