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A TrustZone-assisted secure silicon on a co-design framework

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Resumo:Embedded systems were for a long time, single-purpose and closed systems, characterized by hardware resource constraints and real-time requirements. Nowadays, their functionality is ever-growing, coupled with an increasing complexity and heterogeneity. Embedded applications increasingly demand employment of general-purpose operating systems (GPOSs) to handle operator interfaces and general-purpose computing tasks, while simultaneously ensuring the strict timing requirements. Virtualization, which enables multiple operating systems (OSs) to run on top of the same hardware platform, is gaining momentum in the embedded systems arena, driven by the growing interest in consolidating and isolating multiple and heterogeneous environments. The penalties incurred by classic virtualization approaches is pushing research towards hardware-assisted solutions. Among the existing commercial off-the-shelf (COTS) technologies for virtualization, ARM TrustZone technology is gaining momentum due to the supremacy and lower cost of TrustZone-enabled processors. Programmable system-on-chips (SoCs) are becoming leading players in the embedded systems space, because the combination of a plethora of hard resources with programmable logic enables the efficient implementation of systems that perfectly fit the heterogeneous nature of embedded applications. Moreover, novel disruptive approaches make use of field-programmable gate array (FPGA) technology to enhance virtualization mechanisms. This master’s thesis proposes a hardware-software co-design framework for easing the economy of addressing the new generation of embedded systems requirements. ARM TrustZone is exploited to implement the root-of-trust of a virtualization-based architecture that allows the execution of a GPOS side-by-side with a real-time OS (RTOS). RTOS services were offloaded to hardware, so that it could present simultaneous improvements on performance and determinism. Instead of focusing in a concrete application, the goal is to provide a complete framework, specifically tailored for Zynq-base devices, that developers can use to accelerate a bunch of distinct applications across different embedded industries.
Autores principais:Pereira, Sérgio Augusto Gomes
Assunto:Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informática
Ano:2018
País:Portugal
Tipo de documento:dissertação de mestrado
Tipo de acesso:acesso aberto
Instituição associada:Universidade do Minho
Idioma:inglês
Origem:RepositóriUM - Universidade do Minho
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author Pereira, Sérgio Augusto Gomes
author_facet Pereira, Sérgio Augusto Gomes
author_role author
contributor_name_str_mv Pinto, Sandro
RepositóriUM - Universidade do Minho
country_str PT
creators_json_txt [{\"Person.name\":\"Pereira, Sérgio Augusto Gomes\"}]
datacite.contributors.contributor.contributorName.fl_str_mv Pinto, Sandro
RepositóriUM - Universidade do Minho
datacite.creators.creator.creatorName.fl_str_mv Pereira, Sérgio Augusto Gomes
datacite.date.Accepted.fl_str_mv 2018-01-01T00:00:00Z
datacite.date.available.fl_str_mv 2019-10-10T17:06:08Z
datacite.date.embargoed.fl_str_mv 2019-10-10T17:06:08Z
datacite.rights.fl_str_mv http://purl.org/coar/access_right/c_abf2
datacite.subjects.subject.fl_str_mv Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informática
datacite.titles.title.fl_str_mv A TrustZone-assisted secure silicon on a co-design framework
dc.contributor.none.fl_str_mv Pinto, Sandro
RepositóriUM - Universidade do Minho
dc.creator.none.fl_str_mv Pereira, Sérgio Augusto Gomes
dc.date.Accepted.fl_str_mv 2018-01-01T00:00:00Z
dc.date.available.fl_str_mv 2019-10-10T17:06:08Z
dc.date.embargoed.fl_str_mv 2019-10-10T17:06:08Z
dc.format.none.fl_str_mv application/pdf
dc.identifier.none.fl_str_mv https://hdl.handle.net/1822/61710
dc.language.none.fl_str_mv eng
dc.rights.none.fl_str_mv http://purl.org/coar/access_right/c_abf2
dc.subject.none.fl_str_mv Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informática
dc.title.fl_str_mv A TrustZone-assisted secure silicon on a co-design framework
dc.type.none.fl_str_mv http://purl.org/coar/resource_type/c_bdcc
description Embedded systems were for a long time, single-purpose and closed systems, characterized by hardware resource constraints and real-time requirements. Nowadays, their functionality is ever-growing, coupled with an increasing complexity and heterogeneity. Embedded applications increasingly demand employment of general-purpose operating systems (GPOSs) to handle operator interfaces and general-purpose computing tasks, while simultaneously ensuring the strict timing requirements. Virtualization, which enables multiple operating systems (OSs) to run on top of the same hardware platform, is gaining momentum in the embedded systems arena, driven by the growing interest in consolidating and isolating multiple and heterogeneous environments. The penalties incurred by classic virtualization approaches is pushing research towards hardware-assisted solutions. Among the existing commercial off-the-shelf (COTS) technologies for virtualization, ARM TrustZone technology is gaining momentum due to the supremacy and lower cost of TrustZone-enabled processors. Programmable system-on-chips (SoCs) are becoming leading players in the embedded systems space, because the combination of a plethora of hard resources with programmable logic enables the efficient implementation of systems that perfectly fit the heterogeneous nature of embedded applications. Moreover, novel disruptive approaches make use of field-programmable gate array (FPGA) technology to enhance virtualization mechanisms. This master’s thesis proposes a hardware-software co-design framework for easing the economy of addressing the new generation of embedded systems requirements. ARM TrustZone is exploited to implement the root-of-trust of a virtualization-based architecture that allows the execution of a GPOS side-by-side with a real-time OS (RTOS). RTOS services were offloaded to hardware, so that it could present simultaneous improvements on performance and determinism. Instead of focusing in a concrete application, the goal is to provide a complete framework, specifically tailored for Zynq-base devices, that developers can use to accelerate a bunch of distinct applications across different embedded industries.
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spelling engporEmbedded systems were for a long time, single-purpose and closed systems, characterized by hardware resource constraints and real-time requirements. Nowadays, their functionality is ever-growing, coupled with an increasing complexity and heterogeneity. Embedded applications increasingly demand employment of general-purpose operating systems (GPOSs) to handle operator interfaces and general-purpose computing tasks, while simultaneously ensuring the strict timing requirements. Virtualization, which enables multiple operating systems (OSs) to run on top of the same hardware platform, is gaining momentum in the embedded systems arena, driven by the growing interest in consolidating and isolating multiple and heterogeneous environments. The penalties incurred by classic virtualization approaches is pushing research towards hardware-assisted solutions. Among the existing commercial off-the-shelf (COTS) technologies for virtualization, ARM TrustZone technology is gaining momentum due to the supremacy and lower cost of TrustZone-enabled processors. Programmable system-on-chips (SoCs) are becoming leading players in the embedded systems space, because the combination of a plethora of hard resources with programmable logic enables the efficient implementation of systems that perfectly fit the heterogeneous nature of embedded applications. Moreover, novel disruptive approaches make use of field-programmable gate array (FPGA) technology to enhance virtualization mechanisms. This master’s thesis proposes a hardware-software co-design framework for easing the economy of addressing the new generation of embedded systems requirements. ARM TrustZone is exploited to implement the root-of-trust of a virtualization-based architecture that allows the execution of a GPOS side-by-side with a real-time OS (RTOS). RTOS services were offloaded to hardware, so that it could present simultaneous improvements on performance and determinism. Instead of focusing in a concrete application, the goal is to provide a complete framework, specifically tailored for Zynq-base devices, that developers can use to accelerate a bunch of distinct applications across different embedded industries.application/pdfporA TrustZone-assisted secure silicon on a co-design frameworkPereira, Sérgio Augusto GomesPinto, SandroHostingInstitutionOrganizationalRepositóriUM - Universidade do Minhoe-mailmailto:repositorium@usdb.uminho.ptrepositorium@usdb.uminho.ptTID2022842632019-10-10T17:06:08Z201820182018-01-01T00:00:00ZHandlehttps://hdl.handle.net/1822/61710http://purl.org/coar/access_right/c_abf2open accesshttp://www.oecd.org/science/inno/38235147.pdfFields of Science and Technology (FOS)Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informática16064348 bytesliteraturehttp://purl.org/coar/resource_type/c_bdccmaster thesishttp://purl.org/coar/access_right/c_abf2application/pdffulltexthttps://repositorium.uminho.pt/bitstreams/6a0d0212-3099-4eba-9c4c-46bf87596497/download
spellingShingle A TrustZone-assisted secure silicon on a co-design framework
Pereira, Sérgio Augusto Gomes
Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informática
status SINGLETON
subject.other.fl_str_mv Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informática
title A TrustZone-assisted secure silicon on a co-design framework
title_full A TrustZone-assisted secure silicon on a co-design framework
title_fullStr A TrustZone-assisted secure silicon on a co-design framework
title_full_unstemmed A TrustZone-assisted secure silicon on a co-design framework
title_short A TrustZone-assisted secure silicon on a co-design framework
title_sort A TrustZone-assisted secure silicon on a co-design framework
topic Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informática
topic_facet Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informática
url https://hdl.handle.net/1822/61710
visible 1