Publicação
Multi-core for k-means clustering on FPGA
| Resumo: | In this paper, a configurable many-core hardware/ software architecture is proposed to efficiently execute the widely known and commonly used K-means clustering algorithm. A prototype was designed and implemented on a Xilinx Zynq- 7000 All Programmable SoC. A single core configured with the slowest configuration achieves a 10X speed-up compared to the software only solution. The system is fully scalable and capable of achieving much higher speed-ups by increasing its parallelism. |
|---|---|
| Autores principais: | Canilho, José |
| Outros Autores: | Véstias, Mário; Neto, Horácio |
| Assunto: | Clustering K-means Hardware/Software Co-design Hardware acceleration Systems on Chip |
| Ano: | 2016 |
| País: | Portugal |
| Tipo de documento: | artigo |
| Tipo de acesso: | acesso restrito |
| Instituição associada: | Instituto Politécnico de Lisboa |
| Idioma: | inglês |
| Origem: | Repositório Científico do Instituto Politécnico de Lisboa |
| Resumo: | In this paper, a configurable many-core hardware/ software architecture is proposed to efficiently execute the widely known and commonly used K-means clustering algorithm. A prototype was designed and implemented on a Xilinx Zynq- 7000 All Programmable SoC. A single core configured with the slowest configuration achieves a 10X speed-up compared to the software only solution. The system is fully scalable and capable of achieving much higher speed-ups by increasing its parallelism. |
|---|