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On-chip array of thermoelectric peltier microcoolers

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Detalhes bibliográficos
Resumo:This article reports on the theoretical modelling, the Finite Element Modelling (FEM) simulation, the fabrication process and preliminary results of the first on-chip thermoelectric microcooler array (64 pixels arranged in a 8×8 array), with each pixel independently controlled. This microcooler array uses co-evaporated V–VI compounds of Bi2Te3 and Sb2Te3 as thermoelectric layers, and can be fabricated using planar thin-film technology, lithography and wet etching, on top of a silicon wafer where the CMOS electronic circuits were previously made.
Autores principais:Gonçalves, L. M.
Outros Autores:Rocha, J. G.; Couto, Carlos; Alpuim, P.; Correia, J. H.
Assunto:Thermoelectric Peltier Energy harvesting. Bi2Te3 microcooler telluride Bi Te 2 3
Ano:2008
País:Portugal
Tipo de documento:artigo
Tipo de acesso:acesso aberto
Instituição associada:Universidade do Minho
Idioma:inglês
Origem:RepositóriUM - Universidade do Minho
Descrição
Resumo:This article reports on the theoretical modelling, the Finite Element Modelling (FEM) simulation, the fabrication process and preliminary results of the first on-chip thermoelectric microcooler array (64 pixels arranged in a 8×8 array), with each pixel independently controlled. This microcooler array uses co-evaporated V–VI compounds of Bi2Te3 and Sb2Te3 as thermoelectric layers, and can be fabricated using planar thin-film technology, lithography and wet etching, on top of a silicon wafer where the CMOS electronic circuits were previously made.